Semiconductor power devices, in terms of blocking voltage in design, should provide characteristics of minimum conduction resistance, lower reverse leakage current and faster switching speed to reduce conduction loss and switching loss during operation. Silicon carbide (SiC) has characteristics of a wide energy band gap (for instance, Eg of 4H—SiC can reach 3.26 eV), a higher critical field of dielectric breakdown (2.2 MV/cm) and a higher thermal conduction coefficient (4.9 W/cm-K), hence is deemed an excellent material for making power switching devices. Silicon carbide also is the only compound semiconductor can form thermally grown oxides, hence is suitable for manufacturing MOS controlled switches such as MOSFET (metal oxide semiconductor field effect transistor) and IGBT (insulated gate bipolar transistor).
However, during the thermal oxidation of SiC, the unreacted carbon will remain at the interface and inside of oxide as defects in the form of silicon vacancies, carbon clusters and carbon interstitials, and create energy states in the band gap. These defect states will become acceptor-like traps or donor-like traps at the interface. In general, SiC MOSFET are n-channel MOSFETs. When inversion channel is formed on the p-well, the electrons will be captured by acceptor-like traps near the conduction band, and the density of electrons available for conducting electric current will be reduced. In the meantime the acceptor-like traps filled with electrons will become negatively charged, and cause significant Coulomb scattering of electrons. The reduced electron density and significant Coulomb scattering explain the very low channel mobility and high conduction resistance of SiC MOSFET. Approaches of improving channel mobility and conduction resistance include passivation of the interface traps by post-oxidation annealing with nitric oxide (NO), nitrous oxide (N2O) or POCl3. Non-patent references can be found as follows:    [1]S. Salemi, N. Goldsman, D. P. Eittsserry, A. Akturk, A. Lelis, “The effect of defects and their passivation on the density of states of the 4H-silicon-carbide/silicon-dioxide interface” J. Appl. Phys. 113, 053703, 2013.    [2]H.-F. LI, S. Dimitrijev, D. Sweatman, and H. B. Harrison, “Effect of NO Annealing Conditions on Electrical Characteristics of n-type 4H—SiC-MOS Capacitors” Journal of Electronic Materials, Vol. 29, No. 8, 2000, p. 1027.    [3]D. Okamoto, H. Yano, K. Hirata, T. Hatayama, T. Fuyuki, “Improved Inversion Channel Mobility in 4H—SiC-MOSFETs on Si Face Utilizing Phosphorus-Doped Gate Oxide” IEEE Electron Device Letters, Vol. 31, No. 7, July 2010, p. 710.    [4]Y. K. Sharma, A. C. Ahyi, T. Issacs-Smith, X. Shen, S. T. Pantelides, X. Zhu, L. C. Feldman, J. Rozen, J. R. Williams, “Phosphorous passivation of the SiO2/4H—SiC interface” Solid-State Electronics, 68, 103, 2012.
However, the current approaches of improving channel mobility usually face the trade-off between low conduction resistance and high threshold voltage. A low threshold voltage increases the risk of falsely turn-on during operation of devices.